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Center for Scientific Computation and Mathematical Modeling

Research Activities > Programs > Oversampling and Coarse Quantization for Signals > Peter Petre


Oversampling and Coarse Quantization for Signals


CSIC Building (#406), Seminar Room 4122.
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Fast Numerical Methods for Simulation
and Design of Continuous-Time Delta-Sigma Modulators

 

 

Dr. Peter Petre

HRL Laboratories, LLC


Abstract:   This presentation will present an overview of effective simulation, modeling, and design methods for integrated mixed signal microsystems with special emphasis on high speed continuous-time delta-sigma modulators. In the first part of the presentation, an overview of the wavelet-Galerkin and Jacobian-free eigenspace numerical methods for effective time domain simulations of continuous-time delta-sigma modulators will be given. Simulation results for 2nd –order and 4th-order continuous-time delta-sigma modulators will be given and compared to measured data and simulated data obtained from CADANCE SPICE. Simulation speed and accuracy of the proposed wavelet-Galerkin and Jacobian-free eigenspace methods will be compared to that of CADANCE SPICE. In the second part of the presentation, simulation results for detailed analysis of high speed 2nd –order and 4th-order continuous-time delta-sigma modulators will be given. Circuit phenomena, such as the inter-symbol interference due to temperature mismatch in the feedback 1-bit Digital to Analog Converter (DAC) and Signal to Noise Ratio (SNR) degradation due to circuit non-idealities including thermally induced inter-symbol interference, saturations in gain cells, clock dither, and temperature-dependent timing jitter will be explained in detail. In the last part of the presentation, an automated design strategy developed under the DARPA NeoCAD program for high speed mixed signal circuits will be presented. The proposed design strategy is based upon the concepts of multilevel circuit simulation using behavioral level models for circuit components, automated model order reduction technique, and effective parasitic extraction. Key attributes of the developed time domain simulation tool – “HAARSPICE” – and model order reduction tool - “BEMP” – will be summarized. Analog to Digital Converter (ADC) design examples will be presented.